This invention relates to an amplifier and a driver circuit for driving a capacitive load to a desired voltage. More particularly, the invention relates to a driver circuit capable of driving a data line of a capacitive load at a high speed with low power consumption in an active matrix display device (such as a TFT-LCD or TFT-OLED, etc.).
FIGS. 33A and 33B are diagrams illustrating conventional circuit structures of simplest feedback-type charging means. As shown in FIG. 33A, the charging means includes N-channel MOS transistors 903 and 904 constituting a differential pair in which the sources are coupled together and connected to one end of a constant-current source 905 and gates are connected to an input terminal 1 (Vin) and an output terminal 2 (Vout), respectively; a P-channel MOS transistor 901 (a transistor on the current output side of a current mirror) having its source connected to a higher-side potential power supply VDD, its gate connected to the gate of a P-channel MOS transistor 902 and a drain connected the drain of the N-channel MOS transistor 903; a P-channel MOS transistor 902 (a transistor on the current input side of the current mirror) having its source connected to the higher-potential side power supply VDD and its drain and gate tied together and connected to the drain of the N-channel MOS transistor 904; and a P-channel MOS transistor 906 having the output of the differential pair (the drain of the N-channel MOS transistor 903) input to its gate and having its source connected to the higher-side potential power supply VDD and its drain connected to a node between the output terminal 2 (Vout) and a constant-current source 907.
When Vin greater than Vout holds, the output voltage Vout can be pulled up to Vin at high speed owing to the charging action of the P-channel MOS transistor 906. If the current of the constant-current source 907 is kept sufficiently small, the output voltage Vout can be driven stably to a voltage that is equal to the input voltage Vin.
If the charging capability is very high, however, overshoot occurs owing to a response delay ascribable to parasitic capacitance or the like of the elements in the feedback-type arrangement. But since the discharging capability of the constant-current source 907 is being suppressed, it takes time to recover from the overshoot and to achieve a stable drive in which Vout becomes a voltage equal to Vin. In other words, a problem which arises is that high-speed drive is difficult to achieve.
If the current of current source 907 is increased, the discharging capability is enhanced and overshoot and undershoot are alternately repeated so that oscillation is produced.
In order to prevent such oscillation, a phase compensating capacitor 908 is provided between the connection node of output terminal 2 and the gate of the N-channel MOS transistor 904 and the gate terminal of the P-channel MOS transistor 906, as illustrated in FIG. 33B. As a result, stabilization is achieved rapidly and high-speed drive becomes possible even if the charging capability of P-channel MOS transistor 906 and the discharging capability of constant-current source 907 are both high.
If the phase compensating capacitor 908 is to be charged and discharged at high speed, however, a sufficient current must be made to flow into the current source 905 of the differential stage. As a consequence, a problem which arises is an increase in power consumption.
Reference will now be had to FIG. 35 to describe art proposed by the present inventor in the specification of Japanese Patent Application Laid-Open No. 2000-338461 (Japanese Application No. 11-145768) and in SID00 Digest, pp. 146-149 (distributed on May 14, 2000). As shown in FIG. 35, a circuit 1020 has P-channel MOS transistors 1003 and 1004 whose sources are connected to one ends of constant-current sources 1001 and 1002, respectively, the other ends of which are connected to a higher-potential side power supply VDD. The gate and drain of the P-channel MOS transistor 1003 are tied together and connected to one end of a constant-current source 1005 the other end of which is connected to a lower-potential power supply VSS, the gate of the P-channel MOS transistor 1004 is connected to the gate of the P-channel MOS transistor 1003, the drain of the P-channel MOS transistor 1004 is connected to the power supply VSS, the source of the P-channel MOS transistor 1003 is connected to one output terminal of a changeover switch 1011, and the source of the P-channel MOS transistor 1004 is connected to one input terminal of a changeover switch 1012. A circuit 1030 has N-channel MOS transistors 1007 and 1008 whose sources are connected to one ends of constant-current sources 1009 and 1010, respectively, the other ends of which are connected to the lower-potential side power supply VSS. The gate and drain of the N-channel MOS transistor 1007 are tied together and connected to one end of a constant-current source 1006 the other end of which is connected to the power supply VDD, the gate of the N-channel MOS transistor 1008 is connected to the gate of the N-channel MOS transistor 1007, the drain of the N-channel MOS transistor 1008 is connected to the power supply VDD, the source of the N-channel MOS transistor 1007 is connected to the other output terminal of the changeover switch 1011, and the source of the N-channel MOS transistor 1008 is connected to the other input terminal of the changeover switch 1012. The input terminal of the changeover switch 1011 is connected to the input terminal 1 and the output terminal of the changeover switch 1012 is connected to the output terminal 2. A switch 1013 is connected between the output terminal 2 and the power supply VDD, and a switch 1014 is connected between the output terminal 2 and the power supply VSS.
This circuit performs a driving function by utilizing the source-follower operation of a transistor. In order to achieve a drive with a source-follower operation at all time, when the voltage on the higher-potential side of the output-voltage range is output, the output voltage Vout is pre-charged to the higher-potential side power-supply voltage VDD by a pre-charging circuit 1040, thereby actuating the circuit 1020 and when the voltage on the lower-potential side of the output-voltage range is output, the output voltage Vout is discharged to the power-supply voltage VSS on the low-potential side by the pre-charging circuit 1040, thereby actuating the circuit 1030.
Assume that the circuit 1020 is in a state in which the sources of each of the P-channel MOS transistors 1003 and 1004 have been cut off from the input terminal 1 and output terminal 2. If in this state the currents of the constant-current sources 1001, 1002 and 1005 in circuit 1020 are set in such a manner that the gate-source voltages of the P-channel MOS transistors 1003 and 1004 will become equal, the circuit 1020 will be connected to the input terminal 1 and output terminal 2 and will operate. When the circuit operates, the output terminal 2 that has been pre-charged to the voltage VDD is discharged rapidly by the source-follower operation of the P-channel MOS transistor 1004 and the output voltage Vout is pulled down to a voltage equal to the input voltage, whereby a stable state is achieved.
Similarly, assume that the circuit 1030 is in a state in which the sources of each of the N-channel MOS transistors 1007 and 1008 have been cut off from the input terminal 1 and output terminal 2. If in this state the currents of the constant-current sources 1006, 1009, and 1010 in circuit 1030 are set in such a manner that the gate-source voltages of the N-channel MOS transistors 1007 and 1008 will become equal, the circuit 1030 will be connected to the input terminal 1 and output terminal 2 and will operate. When the circuit operates, the output terminal 2 that has been discharged to the voltage VSS is charged rapidly by the source-follower operation of the N-channel MOS transistor 1008 and the output voltage Vout is pulled up to a voltage equal to the input voltage, whereby stable state is achieved.
Thus, the driver circuit of FIG. 35 controls the pre-charging circuit 1040, the circuit 1020, and the circuit 1030 in an optimal manner in response to the input voltage, thereby making it possible to drive the output voltage Vout to a voltage equal to the input voltage rapidly by source-follower operation.
This circuit is capable of performing drive rapidly based upon source-follower operation merely by flowing a small current in each of the current sources. If a load capacitance is small, the drive can be achieved with a low power consumption. If the load capacitance is large, however, pre-charging or discharging is accompanied by too much charging and discharging and power consumption increases as a result.
Further, much time is required for pre-charging and discharging, making it difficult to achieve high-speed drive.
In a feedback-type amplifier circuit of an operational amplifier according to the prior art, the charging and discharging operations of the output stage are intense. After drive up to a desired voltage is carried out, therefore, overshoot and undershoot are repeated owing to a delay caused by feedback and a stabilized output is not obtained unless phase compensation means (a phase compensating capacitor) is provided.
If a phase compensating capacitor is provided, then, in order to perform high-speed operation, a large current for charging and discharging the phase compensating capacitance at high speed must been passed. This results in an increase in power consumption.
The larger the phase compensating capacitance, the more stable operation becomes. The higher the operating speed is made, therefore, the larger the phase compensating capacitance that must be provided. This leads to a further increase in power consumption.
A feedback-type amplifier circuit of the conventional type (operational-amplifier type) cannot achieve high-speed, stabilized drive with little consumption of power.
Accordingly, it is an object of the present invention to provide a driver circuit in which output voltage Vout can be driven to a level equal to input voltage Vin at high speed with little operation maintaining current, and in which even a large capacitance load can be driven at high speed with low power consumption because operation is not accompanied by needless charging and discharging, thus making it possible to implement high-performance operation.
It is another object of the present invention to provide a driver circuit which is capable of suppressing vibration of an output waveform of the driver circuit in such a case of driving for example a large capacitance load or the like.
It is still another object of the present invention to provide a driver circuit which un-necessitates a phase compensation capacitor with a configuration other than by adopting a charge circuit or a discharge circuit of follower configuration.
A feedback-type amplifier circuit in accordance with the present invention comprises a combination of feedback-type charging means (mainly a voltage-follower circuit) not having a phase compensating capacitor, and source-follower discharging means. More specifically, a feedback-type amplifier circuit in accordance with the present invention comprises: feedback-type charging means, including a differential stage for receiving an input-terminal voltage and an output-terminal voltage differentially as inputs and charging means for performing a charging operation at the output terminal based on an output from said differential stage, said feedback-type charging means operating as a voltage follower in which the output-terminal voltage is in-phase with the input-terminal voltage; and follower-type discharging means for performing a discharging operation at the output terminal by a follower operation of an active element based on a voltage difference between the input-terminal voltage and the output-terminal voltage.
In the amplifier circuit according to the present invention, said follower-type discharging means includes: bias control means, which receives the input-terminal voltage, for controlling an output bias voltage; and a follower transistor connected between the output terminal and a lower-potential side power supply and receiving the bias voltage output from said bias control means applied thereto as an input, wherein output current is controlled on the basis of a difference voltage between the output-terminal voltage and the bias voltage.
According to the present invention, the foregoing object is accomplished by providing a feedback-type amplifier circuit comprising a combination of feedback-type discharging means (mainly a voltage-follower circuit) not having a phase compensating capacitor, and source-follower charging means. More specifically, a feedback-type amplifier circuit in accordance with the present invention comprises: feedback-type discharging means, including a differential stage for receiving an input-terminal voltage and an output-terminal voltage differentially as inputs and discharging means for performing a discharging operation at the output terminal based on an output from the differential stage, said feedback-type discharging means operating as a follower in which the output-terminal voltage is in-phase with the input-terminal voltage; and follower-type charging means for performing a charging operation at the output terminal by a follower operation of an active element based on a voltage difference between the input terminal voltage and the output terminal voltage.
In the amplifier circuit according to the present invention, the follower-type charging means includes: bias control means, which receives the input-terminal voltage, for controlling an output bias voltage; and a follower transistor connected between a higher-potential side power supply and the output terminal and receiving the bias voltage output from said bias control means applied thereto as an input, an output current of said follower transistor controlled on the basis of a difference voltage between the output-terminal voltage and the bias voltage.
In a feed-back type amplifier circuit in accordance with the present invention, there may be provided a capacitor between an output of an differential pair constituting a feed-back type charging means and output terminal for suppressing vibration of an output waveform.
In a feed-back type amplifier circuit in accordance with the present invention, there may be provided a capacitor for suppressing vibration of an output waveform between an output of an differential pair constituting a feed-back type discharging means and output terminal.
A feed-back type amplifier circuit in accordance with the present invention may comprises feedback-type charging means which is capable of pulling up an output voltage by a charging operation based on two inputs of an input voltage and the output voltage, and source-follower discharging may be replaced by a non-feed-back type charging means, which does not adopt a source-follower configuration, operating with a voltage difference between a desired voltage in accordance with an input voltage and an output voltage, independently of the operation of the feedback-type charging means.
A feed-back type amplifier circuit in accordance with the present invention comprises feedback-type charging means, which includes a differential stage for receiving an input-terminal voltage and an output-terminal voltage differentially as inputs, and charging means for performing a charging operation at the output terminal based on an output from said differential stage, said feedback-type charging means operating as a voltage follower in which the output-terminal voltage is in-phase with the input-terminal voltage; and discharging means including a transistor connected across said output terminal and a lower potential side power supply, and bias control means for controlling the bias voltage applied to a control terminal of said transistor; said discharging means having a bias voltage supply terminal for providing a predetermined bias voltage to the control terminal of said transistor, and voltage holding means for sampling and latching a difference voltage between the input-terminal voltage and the bias voltage from the bias voltage supply terminal to hold the latched difference voltage between the output terminal and the control terminal of said transistor.